Puya · Memory
FAE documentary review accepted: both exact order codes are 8-lead SOIC/SOP 150 mil, 64 Kbit, 32-byte page and write buffer, 1 MHz maximum and 5 ms write cycle. Both use device address 1010b + A2/A1/A0 and two word-address bytes. Microchip WP and PUYA WCB are behavior-equivalent (high inhibits writes). PUYA ID-page and serial-number commands are optional extensions outside the normal memory area. Not bench-tested.

