GigaDevice · Memory
| Parameter | W25Q128JVSIQ | GD25Q128ESIG | Engineering note |
|---|---|---|---|
| Package and exact order code | W25Q128JVSIQ: 8-pin SOIC 208-mil, industrial -40 C to +85 C, green package | GD25Q128ESIG: SOP8 208-mil, industrial -40 C to +85 C, green package | Both exact codes select the same surface-mount footprint and temperature grade. Verify the final land pattern and reel format before release. |
| Supply and clock frequency | 2.7 V to 3.6 V; 133 MHz for non-03h commands at 3.0 V to 3.6 V and 104 MHz at 2.7 V to 3.0 V | 2.7 V to 3.6 V; 133 MHz for non-03h commands at 3.0 V to 3.6 V and 104 MHz at 2.7 V to 3.0 V | The published clock limits match across both voltage bands. |
| Slow READ (03h) clock | 50 MHz maximum | 80 MHz maximum | The target is faster; retain the source limit when replacing without firmware timing review. |
| Security registers | Three 256-byte OTP security registers | Three 1024-byte OTP security registers | The target provides larger registers, but firmware must not assume identical addresses or payload sizes. |
| Unique ID | 64-bit unique ID | 128-bit unique ID | Firmware that reads, logs, hashes or whitelists a 64-bit ID must be reviewed. |
| Manufacturer and device ID | Winbond JEDEC manufacturer and device identification | GigaDevice JEDEC manufacturer and device identification | JEDEC IDs differ. Probe or programming code that accepts a fixed ID must add the target ID explicitly. |
FAE documentary review accepted for the exact Winbond W25Q128JVSIQ and GigaDevice GD25Q128ESIG order codes. Both are 128 Mbit SPI NOR flash devices in SOIC/SOP-8 208-mil, 2.7 V to 3.6 V, -40 C to +85 C, with matching pin functions, 256-byte pages, 4 KiB sectors, 100,000 minimum program/erase cycles, 20-year retention and matching 133/104 MHz clock bands. The target has a larger security-register and unique-ID space and different JEDEC IDs. Firmware tied to IDs or security-register size requires review. Document review only; not bench, reliability or production qualified.

