JSCJ · Discrete semiconductors
| Parameter | 2N7002LT1G | 2N7002 | Engineering note |
|---|---|---|---|
| Junction and storage temperature range | -55 C to +150 C | -50 C to +150 C | The target does not cover source operation from -55 C to below -50 C. |
| Maximum RDS(on) at VGS = 10 V, ID = 500 mA | 7.5 ohm | 2.5 ohm | The target specifies lower maximum on-resistance for this test point. |
| Maximum RDS(on) at VGS = 5 V, ID = 50 mA | 7.5 ohm | 3 ohm | The target specifies lower maximum on-resistance for this test point. |
| Gate-threshold voltage | 1.0 V minimum, 2.5 V maximum | 1.0 V minimum, 1.6 V maximum | The target has a narrower threshold window; logic-level drive and off-state noise margin must be checked in the application. |
FAE documentary review accepted for the exact onsemi 2N7002LT1G and JSCJ 2N7002 order codes. Both are 60 V, 115 mA N-channel enhancement MOSFETs in SOT-23 with pin 1 GATE, pin 2 SOURCE and pin 3 DRAIN, 225 mW dissipation and 556 C/W junction-to-ambient resistance. The target has lower maximum RDS(on), but its low-temperature limit is -50 C rather than -55 C and its threshold window differs. Document review only; not bench, reliability or production qualified.

